By Tertulien Ndjountche
High-speed, power-efficient analog built-in circuits can be utilized as standalone units or to interface glossy electronic sign processors and micro-controllers in a number of purposes, together with multimedia, communique, instrumentation, and regulate structures. New architectures and occasional equipment geometry of complementary metaloxidesemiconductor (CMOS) applied sciences have sped up the circulation towards method on a chip layout, which merges analog circuits with electronic, and radio-frequency components.
CMOS: Analog built-in Circuits: High-Speed and Power-Efficient layout describes the $64000 traits in designing those analog circuits and gives an entire, in-depth exam of layout thoughts and circuit architectures, emphasizing functional features of built-in circuit implementation.
Focusing on designing and verifying analog built-in circuits, the writer studies layout suggestions for extra advanced elements comparable to amplifiers, comparators, and multipliers. The publication information all facets, from specification to the ultimate chip, of the advance and implementation technique of filters, analog-to-digital converters (ADCs), digital-to-analog converters (DACs), phase-locked loops (PLLs), and delay-locked loops (DLLs). It additionally describes various an identical transistor versions, layout and fabrication concerns for high-density built-in circuits in deep-submicrometer technique, circuit buildings for the layout of present mirrors and voltage references, topologies of appropriate amplifiers, continuous-time and switched-capacitor circuits, modulator architectures, and methods to enhance linearity of Nyquist converters. The textual content addresses the architectures and function drawback matters affecting circuit operation and gives conceptual and functional ideas to difficulties which can come up within the layout process.
This reference offers balanced assurance of theoretical and sensible matters that would enable the reader to layout CMOS analog built-in circuits with more advantageous electric functionality. The chapters comprise easy-to-follow mathematical derivations of all equations and formulation, graphical plots, and open-ended layout difficulties to aid ascertain most fitted structure for a given set of functionality requisites. This finished and illustrative textual content for the layout and research of CMOS analog built-in circuits serves as a invaluable source for analog circuit designers and graduate scholars in electric engineering.
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Extra resources for CMOS analog integrated circuits : high-speed and power-efficient design
Circuit diagram of a third-order lowpass ladder SC filter. Signal-flow graph extraction sequences. . . . . . Circuit diagram of a third-order discrete-time highpass ladder network. . . . . . . . . . . . . . . Signal-flow graph of a third-order highpass ladder network. Circuit diagram of a third-order highpass ladder SC filter. Signal-flow graph transformations. . . . . . . . (a) Third-order RLC lowpass filter; (b) RLC lowpass filter after circuit transformation.
46 Circuit diagram of a CIC decimation filter with three sections. . . . . . . . . . . . . . . . 47 Register word-lengths in a CIC decimation filter. . . . 48 (a) Single-stage and (b) multistage decimation filters. . 49 Lowpass filter specifications. . . . . . . . . 50 Direct form structure of a linear-phase FIR filter with N even. . . . . . . . . . . . . . . . 51 Direct form structure of a linear-phase FIR filter with N odd. . . .
Circuit diagram of a low-frequency lowpass filter. . . . Circuit diagrams of (a) positive and (b) negative current conveyors. . . . . . . . . . . . . . . Current conveyor-based implementation of the scaling by 1/N. . . . . . . . . . . . . . . . Circuit diagrams of transconductor-based (a) (b) resistors and (c) inductor. . . . . . . . . . . . . Circuit diagram of a second-order bandpass filter. . . Circuit diagram of a biquadratic filter section.